Design rules are used to communicate the limitations of the lithography process to chip designers. Modern design rules consist of strict acceptance/rejection criteria which can be specified for each aspect of a design. For example, typical design criteria might specify that a connection line shall have no less than a specified width or a via shall have no larger than a specified width and length. These design rules are implemented to ensure that both desired electrical characteristics are met and a specific yield is obtained.
For example, due to the lithography process used, interconnect lines may print unacceptably if they are too thin. The smaller the width, the greater the proportion of interconnect lines that will print unacceptably and fail to function as desired. In order to produce functioning chips with an acceptable yield, the manufacturer will specify design rules that govern the design of the chip. Currently, these design rules are “black and white.” For example, a design rule might specify that a interconnect line must have a width of at least 100 nm. In this case, a designer may use a interconnect line with any width of at least 100 nm, but not a transmission line with a width of 99 nm or less.
While these design rules are useful to communicate the limitations of the lithography process, they do not provide the designer with enough information to determine how the chip would be affected if a design rule were modified. Since designers are often required to work within strict space limitations, it would be useful for a designer to determine the impact on the overall design and yield if a particular design rule were changed.
For example, the designer may wish to determine how the overall chance of the chip working would be affected if the minimum width for a interconnect line were reduced to 99 nm, or increased to 105 nm. However, at present, the designer does not have the ability either to adjust the design rules, or to determine the affect of adjusting the design rules.
Furthermore, the design rules are specified based only on the lithography process, without taking into account the type of chip being designed. The failure of even one circuit element can cause the entire chip to fail. Thus, for very large chips with a large number of circuit elements, it may be desirable to make the design rules relatively conservative to preserve the yield. However, for smaller chips in which obtaining an acceptable yield is not as difficult, it may be desirable to make the design rules less conservative, for example, to improve the timing or other performance aspects. Other properties of the chip to be designed may similarly affect the design process. For example, timing requirements, power requirements, or other properties may have an effect on the design. It is therefore desirable to allow a chip designer to alter the design rules, and to determine the effect of such alterations.